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pic24_dma.h
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1 /* Standard copyright does not go in this file because
2 * of the use of Microchip provided macros, see comments below.
3 */
4 
5 
6 // Documentation for this file. If the \file tag isn't present,
7 // this file won't be documented.
8 /** \file
9  * DMA module support functions.
10  */
11 
12 
13 
14 #ifndef _PIC24_DMA_H_
15 #define _PIC24_DMA_H_
16 
17 
18 /* And/OR Macros */
19 #define DMA_MODULE_ON 0x8000 /* A/D Converter on */
20 #define DMA_MODULE_OFF 0x0000 /* A/D Converter off */
21 #define DMA_MODULE_MASK (~DMA_MODULE_ON)
22 
23 #define DMA_SIZE_BYTE 0x4000 /* DMA data size is byte */
24 #define DMA_SIZE_WORD 0x0000 /* DMA data size is word */
25 #define DMA_SIZE_MASK (~DMA_SIZE_BYTE);
26 
27 #define DMA_DIR_WRITE_PERIPHERAL 0x2000 /* Read from DMA RAM address, write to peripheral*/
28 #define DMA_DIR_READ_PERIPHERAL 0x0000 /* Read from peripheral address, write to DMA RAM*/
29 #define DMA_DIR_MASK (~DMA_DIR_WRITE_PERIPHERAL)
30 
31 #define DMA_INTERRUPT_HALF 0x1000 /* interrupt on half full */
32 #define DMA_INTERRUPT_FULL 0x0000 /* interrupt on full */
33 #define DMA_INTERRUPT_MASK (~DMA_INTERRUPT_HALF)
34 
35 #define DMA_NULLW_ON 0x0800 /* Null data write to peripheral in addition to DMA RAM write*/
36 #define DMA_NULLW_OFF 0x0000 /* Normal operation*/
37 #define DMA_NULLW_MASK (~DMA_NULLW_ON)
38 
39 #define DMA_AMODE_PERIPHERAL_INDIRECT 0x0020 /* Peripheral indirect addressing mode*/
40 #define DMA_AMODE_REGISTER_INDIRECT 0x0010 /* Register indirect without post increment*/
41 #define DMA_AMODE_REGISTER_POSTINC 0x0000 /* Register indirect with post-incrmenent mode*/
42 #define DMA_AMODE_MASK (~DMA_AMODE_PERIPHERAL_INDIRECT)
43 
44 
45 #define DMA_MODE_ONE_SHOT_PING_PONG 0x0003 /* One-Shot, Ping-Pong modes enabled*/
46 #define DMA_MODE_CONTINUOUS_PING_PONG 0x0002 /* Continuous Ping-Pong modes enabled*/
47 #define DMA_MODE_ONE_SHOT 0x0001 /* One-shot Ping-Pong mode disabled*/
48 #define DMA_MODE_CONTINUOUS 0x0000 /* Continuous, Ping-pong modes disabled */
49 #define DMA_MODE_MASK (~DMA_MODE_ONE_SHOT_PING_PONG)
50 
51 
52 #define DMA_IRQ_INT0 0x0000
53 #define DMA_IRQ_IC1 0x0001
54 #define DMA_IRQ_OC1 0x0002
55 #define DMA_IRQ_IC2 0x0005
56 #define DMA_IRQ_OC2 0x0006
57 #define DMA_IRQ_TMR2 0x0007
58 #define DMA_IRQ_TMR3 0x0008
59 #define DMA_IRQ_SPI1 0x000A
60 #define DMA_IRQ_U1RX 0x000B
61 #define DMA_IRQ_U1TX 0x000C
62 #define DMA_IRQ_ADC1 0x000D
63 #define DMA_IRQ_ADC2 0x0015
64 #define DMA_IRQ_U2RX 0x001E
65 #define DMA_IRQ_U2TX 0x001F
66 #define DMA_IRQ_SPI2 0x0021
67 #define DMA_IRQ_ECAN1RX 0x0022
68 #define DMA_IRQ_ECAN2RX 0x0037
69 #define DMA_IRQ_ECAN1TX 0x0046
70 #define DMA_IRQ_ECAN2TX 0x0047
71 
72 
73 #endif