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10 #ifndef _PIC24_TIMER_H_
11 #define _PIC24_TIMER_H_
24 #define getTimerPrescale(TxCONbits) getTimerPrescaleBits(TxCONbits.TCKPS)
26 #define MS_TO_TICKS(ms, pre) ((FCY/1000L/(pre))*ms)
51 #define T1_OFF_ON_MASK (~T1_ON)
53 #define T1_IDLE_STOP 0x2000
54 #define T1_IDLE_CON 0x0000
55 #define T1_IDLE_MASK (~T1_IDLE_STOP)
57 #define T1_GATE_ON 0x0040
58 #define T1_GATE_OFF 0x0000
59 #define T1_GATE_MASK (~T1_GATE_ON)
61 #define T1_PS_1_1 0x0000
62 #define T1_PS_1_8 0x0010
63 #define T1_PS_1_64 0x0020
64 #define T1_PS_1_256 0x0030
65 #define T1_PS_MASK (~T1_PS_1_256)
67 #define T1_SYNC_EXT_ON 0x0004
68 #define T1_SYNC_EXT_OFF 0x0000
69 #define T1_SYNC_EXT_MASK (~T1_SYNC_EXT_ON)
71 #define T1_SOURCE_EXT 0x0002
72 #define T1_SOURCE_INT 0x0000
73 #define T1_SOURCE_MASK (~T1_SOURCE_EXT)
79 #define T2_OFF_ON_MASK (~T2_ON)
81 #define T2_IDLE_STOP 0x2000
82 #define T2_IDLE_CON 0x0000
83 #define T2_IDLE_MASK (~T2_IDLE_STOP)
85 #define T2_GATE_ON 0x0040
86 #define T2_GATE_OFF 0x0000
87 #define T2_GATE_MASK (~T2_GATE_ON)
89 #define T2_PS_1_1 0x0000
90 #define T2_PS_1_8 0x0010
91 #define T2_PS_1_64 0x0020
92 #define T2_PS_1_256 0x0030
93 #define T2_PS_MASK (~T2_PS_1_256)
95 #define T2_32BIT_MODE_ON 0x0008
96 #define T2_32BIT_MODE_OFF 0x0000
97 #define T2_32BIT_MODE_MASK (~T2_32BIT_MODE_ON)
99 #define T2_SOURCE_EXT 0x0002
100 #define T2_SOURCE_INT 0x0000
101 #define T2_SOURCE_MASK (~T2_SOURCE_EXT)
107 #define T3_OFF 0x0000
108 #define T3_OFF_ON_MASK (~T3_ON)
110 #define T3_IDLE_STOP 0x2000
111 #define T3_IDLE_CON 0x0000
112 #define T3_IDLE_MASK (~T3_IDLE_STOP)
114 #define T3_GATE_ON 0x0040
115 #define T3_GATE_OFF 0x0000
116 #define T3_GATE_MASK (~T3_GATE_ON)
118 #define T3_PS_1_1 0x0000
119 #define T3_PS_1_8 0x0010
120 #define T3_PS_1_64 0x0020
121 #define T3_PS_1_256 0x0030
122 #define T3_PS_MASK (~T3_PS_1_256)
124 #define T3_SOURCE_EXT 0x0002
125 #define T3_SOURCE_INT 0x0000
126 #define T3_SOURCE_MASK (~T3_SOURCE_EXT)
132 #define T4_OFF 0x0000
133 #define T4_OFF_ON_MASK (~T4_ON)
135 #define T4_IDLE_STOP 0x2000
136 #define T4_IDLE_CON 0x0000
137 #define T4_IDLE_MASK (~T4_IDLE_STOP)
139 #define T4_GATE_ON 0x0040
140 #define T4_GATE_OFF 0x0000
141 #define T4_GATE_MASK (~T4_GATE_ON)
143 #define T4_PS_1_1 0x0000
144 #define T4_PS_1_8 0x0010
145 #define T4_PS_1_64 0x0020
146 #define T4_PS_1_256 0x0030
147 #define T4_PS_MASK (~T4_PS_1_256)
149 #define T4_32BIT_MODE_ON 0x0008
150 #define T4_32BIT_MODE_OFF 0x0000
151 #define T4_32BIT_MODE_MASK (~T4_32BIT_MODE_ON)
153 #define T4_SOURCE_EXT 0x0002
154 #define T4_SOURCE_INT 0x0000
155 #define T4_SOURCE_MASK (~T4_SOURCE_EXT)
161 #define T5_OFF 0x0000
162 #define T5_OFF_ON_MASK (~T5_ON)
164 #define T5_IDLE_STOP 0x2000
165 #define T5_IDLE_CON 0x0000
166 #define T5_IDLE_MASK (~T5_IDLE_STOP)
168 #define T5_GATE_ON 0x0040
169 #define T5_GATE_OFF 0x0000
170 #define T5_GATE_MASK (~T5_GATE_ON)
172 #define T5_PS_1_1 0x0000
173 #define T5_PS_1_8 0x0010
174 #define T5_PS_1_64 0x0020
175 #define T5_PS_1_256 0x0030
176 #define T5_PS_MASK (~T5_PS_1_256)
178 #define T5_SOURCE_EXT 0x0002
179 #define T5_SOURCE_INT 0x0000
180 #define T5_SOURCE_MASK (~T5_SOURCE_EXT)
186 #define T6_OFF 0x0000
187 #define T6_OFF_ON_MASK (~T6_ON)
189 #define T6_IDLE_STOP 0x2000
190 #define T6_IDLE_CON 0x0000
191 #define T6_IDLE_MASK (~T6_IDLE_STOP)
193 #define T6_GATE_ON 0x0040
194 #define T6_GATE_OFF 0x0000
195 #define T6_GATE_MASK (~T6_GATE_ON)
197 #define T6_PS_1_1 0x0000
198 #define T6_PS_1_8 0x0010
199 #define T6_PS_1_64 0x0020
200 #define T6_PS_1_256 0x0030
201 #define T6_PS_MASK (~T6_PS_1_256)
203 #define T6_32BIT_MODE_ON 0x0008
204 #define T6_32BIT_MODE_OFF 0x0000
205 #define T6_32BIT_MODE_MASK (~T6_32BIT_MODE_ON)
207 #define T6_SOURCE_EXT 0x0002
208 #define T6_SOURCE_INT 0x0000
209 #define T6_SOURCE_MASK (~T6_SOURCE_EXT)
215 #define T7_OFF 0x0000
216 #define T7_OFF_ON_MASK (~T7_ON)
218 #define T7_IDLE_STOP 0x2000
219 #define T7_IDLE_CON 0x0000
220 #define T7_IDLE_MASK (~T7_IDLE_STOP)
222 #define T7_GATE_ON 0x0040
223 #define T7_GATE_OFF 0x0000
224 #define T7_GATE_MASK (~T7_GATE_ON)
226 #define T7_PS_1_1 0x0000
227 #define T7_PS_1_8 0x0010
228 #define T7_PS_1_64 0x0020
229 #define T7_PS_1_256 0x0030
230 #define T7_PS_MASK (~T7_PS_1_256)
232 #define T7_SOURCE_EXT 0x0002
233 #define T7_SOURCE_INT 0x0000
234 #define T7_SOURCE_MASK (~T7_SOURCE_EXT)
240 #define T8_OFF 0x0000
241 #define T8_OFF_ON_MASK (~T8_ON)
243 #define T8_IDLE_STOP 0x2000
244 #define T8_IDLE_CON 0x0000
245 #define T8_IDLE_MASK (~T8_IDLE_STOP)
247 #define T8_GATE_ON 0x0040
248 #define T8_GATE_OFF 0x0000
249 #define T8_GATE_MASK (~T8_GATE_ON)
251 #define T8_PS_1_1 0x0000
252 #define T8_PS_1_8 0x0010
253 #define T8_PS_1_64 0x0020
254 #define T8_PS_1_256 0x0030
255 #define T8_PS_MASK (~T8_PS_1_256)
257 #define T8_32BIT_MODE_ON 0x0008
258 #define T8_32BIT_MODE_OFF 0x0000
259 #define T8_32BIT_MODE_MASK (~T8_32BIT_MODE_ON)
261 #define T8_SOURCE_EXT 0x0002
262 #define T8_SOURCE_INT 0x0000
263 #define T8_SOURCE_MASK (~T8_SOURCE_EXT)
269 #define T9_OFF 0x0000
270 #define T9_OFF_ON_MASK (~T9_ON)
272 #define T9_IDLE_STOP 0x2000
273 #define T9_IDLE_CON 0x0000
274 #define T9_IDLE_MASK (~T9_IDLE_STOP)
276 #define T9_GATE_ON 0x0040
277 #define T9_GATE_OFF 0x0000
278 #define T9_GATE_MASK (~T9_GATE_ON)
280 #define T9_PS_1_1 0x0000
281 #define T9_PS_1_8 0x0010
282 #define T9_PS_1_64 0x0020
283 #define T9_PS_1_256 0x0030
284 #define T9_PS_MASK (~T9_PS_1_256)
286 #define T9_SOURCE_EXT 0x0002
287 #define T9_SOURCE_INT 0x0000
288 #define T9_SOURCE_MASK (~T9_SOURCE_EXT)
300 #if (defined(__dsPIC33E__) || defined(__PIC24E__))
301 #define IC_IDLE_STOP 0x2000
302 #define IC_IDLE_CON 0x0000
303 #define IC_IDLE_MASK (~IC_IDLE_STOP)
305 #define IC_TIMER2_SRC (1 << 10)
306 #define IC_TIMER3_SRC 0x0000
307 #define IC_TIMER_SRC_MASK (~ (7 << 10) )
309 #define IC_INT_4CAPTURE 0x0060
310 #define IC_INT_3CAPTURE 0x0040
311 #define IC_INT_2CAPTURE 0x0020
312 #define IC_INT_1CAPTURE 0x0000
313 #define IC_INT_CAPTURE_MASK (~IC_INT_4CAPTURE)
315 #define IC_INTERRUPT 0x0007
316 #define IC_EVERY_16_RISE_EDGE 0x0005
317 #define IC_EVERY_4_RISE_EDGE 0x0004
318 #define IC_EVERY_RISE_EDGE 0x0003
319 #define IC_EVERY_FALL_EDGE 0x0002
320 #define IC_EVERY_EDGE 0x0001
321 #define IC_INPUTCAP_OFF 0x0000
322 #define IC_CAPTURE_MODE_MASK (~IC_INTERRUPT)
325 #define IC_IDLE_STOP 0x2000
326 #define IC_IDLE_CON 0x0000
327 #define IC_IDLE_MASK (~IC_IDLE_STOP)
329 #define IC_TIMER2_SRC 0x0080
330 #define IC_TIMER3_SRC 0x0000
331 #define IC_TIMER_SRC_MASK (~IC_TIMER2_SRC)
333 #define IC_INT_4CAPTURE 0x0060
334 #define IC_INT_3CAPTURE 0x0040
335 #define IC_INT_2CAPTURE 0x0020
336 #define IC_INT_1CAPTURE 0x0000
337 #define IC_INT_CAPTURE_MASK (~IC_INT_4CAPTURE)
339 #define IC_INTERRUPT 0x0007
340 #define IC_EVERY_16_RISE_EDGE 0x0005
341 #define IC_EVERY_4_RISE_EDGE 0x0004
342 #define IC_EVERY_RISE_EDGE 0x0003
343 #define IC_EVERY_FALL_EDGE 0x0002
344 #define IC_EVERY_EDGE 0x0001
345 #define IC_INPUTCAP_OFF 0x0000
346 #define IC_CAPTURE_MODE_MASK (~IC_INTERRUPT)
359 #if (defined(__dsPIC33E__) || defined(__PIC24E__))
360 #define OC_IDLE_CON 0x0000
361 #define OC_IDLE_STOP 0x2000
362 #define OC_IDLE_MASK (~OC_IDLE_STOP)
363 #define OC_TIMER2_SRC 0x0000
364 #define OC_TIMER3_SRC (1 << 10)
365 #define OC_TIMER_SRC_MASK (~ (7 << 10) )
367 #define OC_PWM_CENTER_ALIGN 0x0007
368 #define OC_PWM_EDGE_ALIGN 0x0006
369 #define OC_CONTINUE_PULSE 0x0005
370 #define OC_SINGLE_PULSE 0x0004
371 #define OC_TOGGLE_PULSE 0x0003
372 #define OC_HIGH_LOW 0x0002
373 #define OC_LOW_HIGH 0x0001
374 #define OC_OFF 0x0000
375 #define OC_PWM_MODE_MASK (~OC_PWM_FAULT_PIN_ENABLE)
377 #define OC_PWM_FAULT_PIN_ENABLE 0x0007
378 #define OC_PWM_FAULT_PIN_DISABLE 0x0006
382 #define OC_IDLE_CON 0x0000
383 #define OC_IDLE_STOP 0x2000
384 #define OC_IDLE_MASK (~OC_IDLE_STOP)
387 #define OC_TIMER2_SRC 0x0000
388 #define OC_TIMER3_SRC 0x0008
389 #define OC_TIMER_SRC_MASK (~OC_TIMER3_SRC)
391 #define OC_PWM_FAULT_PIN_ENABLE 0x0007
392 #define OC_PWM_FAULT_PIN_DISABLE 0x0006
393 #define OC_CONTINUE_PULSE 0x0005
394 #define OC_SINGLE_PULSE 0x0004
395 #define OC_TOGGLE_PULSE 0x0003
396 #define OC_HIGH_LOW 0x0002
397 #define OC_LOW_HIGH 0x0001
398 #define OC_OFF 0x0000
399 #define OC_PWM_MODE_MASK (~OC_PWM_FAULT_PIN_ENABLE)