72 #ifndef _PIC24_CLOCKFREQ_H_
73 #define _PIC24_CLOCKFREQ_H_
86 #define PIC24F_DEFINED 1
88 #define PIC24F_DEFINED 0
91 #define PIC24H_DEFINED 1
93 #define PIC24H_DEFINED 0
96 #define dsPIC33F_DEFINED 1
98 #define dsPIC33F_DEFINED 0
101 #define PIC24FK_DEFINED 1
103 #define PIC24FK_DEFINED 0
106 #define PIC24E_DEFINED 1
108 #define PIC24E_DEFINED 0
111 #define dsPIC33E_DEFINED 1
113 #define dsPIC33E_DEFINED 0
153 #define SIM_CLOCK 0, -1, 1000000L, POSCMD_NONE, -1, 1, configClockSim, 498
154 #define FRCPLL_FCY16MHz 1, FNOSC_FRCPLL, 16000000L, POSCMD_NONE, -1, (PIC24F_DEFINED || PIC24FK_DEFINED), configClockFRCPLL_FCY16MHz, 498
155 #define FRC_FCY4MHz 2, FNOSC_FRC, 4000000L, POSCMD_NONE, -1, (PIC24F_DEFINED || PIC24FK_DEFINED), configClockFRC_FCY4MHz, 498
156 #define PRI_NO_PLL_7372KHzCrystal 3, FNOSC_PRI, 3686400L, POSCMD_XT, 7372800L, (PIC24F_DEFINED || PIC24FK_DEFINED || PIC24H_DEFINED || dsPIC33F_DEFINED), configClockPRI_NO_PLL_7372KHzCrystal, 498
157 #define FRC_FCY3685KHz 4, FNOSC_FRC, 3685000L, POSCMD_NONE, -1, (PIC24E_DEFINED || dsPIC33E_DEFINED|| PIC24H_DEFINED || dsPIC33F_DEFINED), configClockFRC_FCY3685KHz, 498
158 #define FRCPLL_FCY40MHz 5, FNOSC_FRCPLL, 40000000L, POSCMD_NONE, -1, (PIC24H_DEFINED || dsPIC33F_DEFINED), configClockFRCPLL_FCY40MHz, 498
159 #define PRIPLL_7372KHzCrystal_40MHzFCY 6, FNOSC_PRIPLL, 40000000L, POSCMD_XT, 7372800L, (PIC24H_DEFINED || dsPIC33F_DEFINED), configClockPRIPLL_7372KHzCrystal_40MHzFCY, 498
160 #define PRIPLL_8MHzCrystal_40MHzFCY 7, FNOSC_PRIPLL, 40000000L, POSCMD_XT, 8000000L, (PIC24H_DEFINED || dsPIC33F_DEFINED || PIC24E_DEFINED || dsPIC33E_DEFINED), configClockPRIPLL_8MHzCrystal_40MHzFCY, 498
161 #define PRIPLL_8MHzCrystal_16MHzFCY 8, FNOSC_PRIPLL, 16000000L, POSCMD_XT, 8000000L, (PIC24F_DEFINED || PIC24FK_DEFINED), configClockPRIPLL_8MHzCrystal_16MHzFCY, 498
162 #define PRI_8MHzCrystal_4MHzFCY 9, FNOSC_PRI, 4000000L, POSCMD_XT, 8000000L, (PIC24F_DEFINED || PIC24FK_DEFINED || PIC24H_DEFINED || dsPIC33F_DEFINED), configClockPRI_8MHzCrystal_4MHzFCY, 498
163 #define FRCPLL_FCY60MHz 10, FNOSC_FRCPLL, 60000000L, POSCMD_NONE, -1, (PIC24E_DEFINED || dsPIC33E_DEFINED), configClockFRCPLL_FCY60MHz, 498
164 #define FRCPLL_FCY70MHz 11, FNOSC_FRCPLL, 70000000L, POSCMD_NONE, -1, (PIC24E_DEFINED || dsPIC33E_DEFINED), configClockFRCPLL_FCY70MHz, 498
168 #ifndef __DOXYGEN__ // The following non-standard #if confuses Doxygen
173 #if (CLOCK_CONFIG != 498)
174 #error ***********************************************************************
175 #error * Value chosen for CLOCK_CONFIG does not exist or is not valid! *
176 #error * This produces very confusing compiler errors below. *
177 #error ***********************************************************************
187 #define POSCMD_EC POSCMOD_EC
188 #define POSCMD_XT POSCMOD_XT
189 #define POSCMD_HS POSCMOD_HS
190 #define POSCMD_NONE POSCMOD_NONE
199 #define GET_CLOCK_CONFIG_INDEX(params) _GET_CLOCK_CONFIG_INDEX(params)
200 #define GET_FNOSC_SEL(params) _GET_FNOSC_SEL(params)
201 #define GET_FCY(params) _GET_FCY(params)
202 #define GET_POSCMD_SEL(params) _GET_POSCMD_SEL(params)
203 #define GET_POSC_FREQ(params) _GET_POSC_FREQ(params)
204 #define GET_IS_SUPPORTED(params) _GET_IS_SUPPORTED(params)
205 #define GET_CONFIG_DEFAULT_CLOCK(params) _GET_CONFIG_DEFAULT_CLOCK(params)
209 #define _GET_CLOCK_CONFIG_INDEX(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClock, magic) ndx
210 #define _GET_FNOSC_SEL(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClockFunc, magic) oscSel
211 #define _GET_FCY(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClockFunc, magic) Fcy
212 #define _GET_POSCMD_SEL(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClockFunc, magic) posCmdSel
213 #define _GET_POSC_FREQ(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClockFunc, magic) poscFreq
214 #define _GET_IS_SUPPORTED(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClockFunc, magic) isSupported
215 #define _GET_CONFIG_DEFAULT_CLOCK(ndx, oscSel, Fcy, posCmdSel, poscFreq, isSupported, configClockFunc, magic) configClockFunc
219 #define CLOCK_CONFIG_INDEX GET_CLOCK_CONFIG_INDEX(CLOCK_CONFIG)
220 #define FNOSC_SEL GET_FNOSC_SEL(CLOCK_CONFIG)
221 #define FCY GET_FCY(CLOCK_CONFIG)
222 #define POSCMD_SEL GET_POSCMD_SEL(CLOCK_CONFIG)
223 #define POSC_FREQ GET_POSC_FREQ(CLOCK_CONFIG)
224 #define CONFIG_DEFAULT_CLOCK() GET_CONFIG_DEFAULT_CLOCK(CLOCK_CONFIG)()
227 #if !GET_IS_SUPPORTED(CLOCK_CONFIG)
228 #error The clock configuration chosen is not supported by this processor.
232 #if (POSCMD_SEL == POSCMD_XT) && ( (POSC_FREQ < 3500000L) || (POSC_FREQ > 10000000L) )
233 #error The XT oscialltor chosen in POSCMD_SEL does not support this frequency!
234 #error Valid ranges are from 3.5 MHz to 10 MHz.
236 #if (POSCMD_SEL == POSCMD_HS) && ( (POSC_FREQ < 10000000L) || (POSC_FREQ > 32000000L) )
237 #error The HS oscialltor chosen in POSCMD_SEL does not support this frequency!
238 #error Valid ranges are from 10 MHz to 32 MHz.
322 #define CYCLES_PER_MS ((uint32_t)(FCY * 0.001))
328 #define CYCLES_PER_US ((uint32_t)(FCY * 0.000001))
343 #define IS_CLOCK_CONFIG(clockConfig) (_GET_CLOCK_CONFIG_INDEX(clockConfig) == CLOCK_CONFIG_INDEX)
349 #define GET_OSC_SEL_BITS(bits) _GET_OSC_SEL_BITS(bits)
351 #if defined(__PIC24H__) || defined (__PIC24FK__) || defined(__dsPIC33F__) || defined(__PIC24E__) || defined(__dsPIC33E__) || defined(__DOXYGEN__)
352 #define _GET_OSC_SEL_BITS(bits) ((bits >> 0) & 0x07)
353 #elif defined (__PIC24F__)
354 #define _GET_OSC_SEL_BITS(bits) ((bits >> 8) & 0x07)
356 #error Unknown processor
362 #define OSC_SEL_BITS GET_OSC_SEL_BITS(FNOSC_SEL)
365 #if ( (OSC_SEL_BITS < 0) || (OSC_SEL_BITS > 7) )
366 #error Invalid oscillator selection FNOSC_SEL.
374 #if GET_IS_SUPPORTED(SIM_CLOCK)
383 void configClockSim(
void);
386 #if GET_IS_SUPPORTED(FRCPLL_FCY16MHz)
387 void configClockFRCPLL_FCY16MHz(
void);
390 #if GET_IS_SUPPORTED(FRC_FCY4MHz)
391 void configClockFRC_FCY4MHz(
void);
394 #if GET_IS_SUPPORTED(PRI_NO_PLL_7372KHzCrystal)
395 void configClockPRI_NO_PLL_7372KHzCrystal(
void);
398 #if GET_IS_SUPPORTED(FRC_FCY3685KHz)
399 void configClockFRC_FCY3685KHz(
void);
402 #if GET_IS_SUPPORTED(FRCPLL_FCY40MHz)
403 void configClockFRCPLL_FCY40MHz(
void);
406 #if GET_IS_SUPPORTED(FRCPLL_FCY60MHz)
407 void configClockFRCPLL_FCY60MHz(
void);
410 #if GET_IS_SUPPORTED(FRCPLL_FCY70MHz)
411 void configClockFRCPLL_FCY70MHz(
void);
414 #if GET_IS_SUPPORTED(PRI_NO_PLL_7372KHzCrystal)
415 void configClockPRIPLL_7372KHzCrystal_40MHzFCY(
void);
418 #if GET_IS_SUPPORTED(PRIPLL_8MHzCrystal_40MHzFCY)
419 void configClockPRIPLL_8MHzCrystal_40MHzFCY(
void);
422 #if GET_IS_SUPPORTED(PRIPLL_8MHzCrystal_16MHzFCY)
423 void configClockPRIPLL_8MHzCrystal_16MHzFCY(
void);
426 #if GET_IS_SUPPORTED(PRI_8MHzCrystal_4MHzFCY)
427 void configClockPRI_8MHzCrystal_4MHzFCY(
void);